As is known, in different processes of fabricating semiconductor devices, it is necessary to form deep trenches within a semiconductor wafer. In practice, trenches must be opened, which have a depth much greater than at least one transverse dimension. For this purpose, various methods have been developed, which enable removal of semiconductor material in a markedly directional way, which as a rule is perpendicular to the surface of the semiconductor wafer and is referred to as a “digging direction.” The efficiency of etching in a direction transverse with respect to the digging direction is in principle negligible.
Frequently, however, conflicting requirements must be satisfied. In particular, favoring directionality of an etching step frequently leads to sacrificing speed, and vice versa.
To overcome the above drawback, a known method envisages alternation of etching steps, which are far from directional but very aggressive, and steps of passivation, which protect the structures surrounding the digging in a direction transverse to the etching direction. In practice, after forming a resist mask that exposes portions of the surface of a semiconductor wafer that are to be etched, a polymeric passivating layer is conformally deposited. The wafer is then immersed in an etching fluid, for example SF6, which, after eliminating the passivating layer, etches the underlying structures. However, the passivating layer is more rapidly removed on the semiconductor material than on the resist and much more rapidly on the surfaces substantially parallel to the surface of the wafer than on the perpendicular surfaces. Consequently, the digging proceeds initially in a direction substantially perpendicular to the surface of the wafer and only to a minimal extent in a transverse direction. When the passivating layer has been almost completely removed, the etching process is interrupted and a new passivating layer is formed. A subsequent etching step will thus resume the process of aggression of the semiconductor material in a direction substantially perpendicular to the surface of the wafer, whereas the walls around the trench that is being formed are protected. By alternating the described etching and passivation steps, it is possible to safeguard the directionality of the etch as a whole and at the same time maintain a satisfactory speed.
Control of the etch in a direction transverse to the digging direction, however, is less and less precise as the depth increases and may become critical if it is necessary to form a plurality of trenches close to one another, separated by thin diaphragms of semiconductor material, as in the case of some processes of fabrication of SOI (Silicon On Insulator) wafers. As the depth increases, the deposition of the passivating layer is less effective, and hence the walls of the trenches are less protected. The etch, then, tends to lose directionality, and the trenches widen, whereas the diaphragms thin out towards the base, with the risk of collapsing. The initial thickness of the diaphragms (i.e., towards the surface of the wafer) must be oversized to prevent any failure. Furthermore, in order to favor polymerization and hence formation of the passivating layer, the process must be performed at temperatures that are significantly lower than the ones required for normal etching processes (below room temperature or even at temperatures lower than 0° C.), but for this purpose special machinery is required.